@comment{ See CROSS.DOC[UP,DOC] for a formated version of this manual }
@device(doc)
@make(manual)
@define(oplist=description,spread 0,facecode t,justification off)
@heading(CROSS)
@center(@value(date))
The material used in this specification, including but
not limited to construction times and operating speeds,
is for informational purposes only.  All such material
is subject to change without notice.


This document describes the operational procedures
for CROSS, an assembler which operates on the 
DECsystem-10/20 systems, translating source code for
6502, 6800, 8080, 8085, Z80, 1802, F8[future], and 8008
micro-processors into binary files suitable for
absolute load.

All of the appendices to this manual and the index  were constructed by Joseph M.
Newcomer, Carnegie-Mellon University Computer Science Department.
@pageheading(center "CROSS-Microcomputer cross assembler",right "@ref(page)")

@chapter(Introduction)@label(intro)
@pagefooting(immediate,right "Introduction")



CROSS is an assembler which operates on the DECsystem-10/20 and
assembles code for many currently available micro-processors. With the
exception of the variations listed in this manual, CROSS implements the
features of the PDP-11 macro assembler for RSX-11D.  No attempt was
made to provide source compatibility between CROSS and other micro-
processor assemblers.  Rather, CROSS has been designed to provide
consistent, powerful features for all of the mnemonics associated
with each micro-processor.

While CROSS is designed to be language compatible with the
MACRO-11 language, its PDP-10 operating environment necessitates
a PDP-10 style operating procedure.

Expression evaluation has been updated to provide the following
features:

@enter(itemize)
@index(Radix, default)
@index(Radix, decimal)
@index(Radix, 10)
@index(Decimal radix)
Default radix is decimal.

@index(@@<expr>)
@index(Octal radix)
@index(Radix 8)
@index(Radix, octal)
@index(↑O<expr>)
@b[@@<expr>] indicates octal radix, same as to @b[↑O<expr>]

@index(%<expr>)
@index(↑B<expr>)
@index(Radix 2)
@index(Binary radix)
@index(Radix, binary)
@b[%<expr>] indicates binary (6502/6800 only), same as to @b[↑B<expr>]

@index(%nn, register)
@index(Register %nn)
@b[%nn]   indicates register value nn (all others)

@index($<expr>)
@index(Radix 16)
@index(Radix, hexidecimal)
@index(Hexidecimal radix)
@b[$<expr>] indicates hexidecimal radix

@index(↑, <expr>↑)
@index(Byte, high)
@index(High byte)
@b[<expr>↑] indicates that the evaluated expression is to be divided
by 256. (high byte)

@leave(itemize)
The assembler makes two passes over the source, outputting
the binary and listing files during pass two and appending a symbol
or cross reference table to the listing file.  PDP-10 memory is
dynamically allocated for large symbol table storage and macro storage.

@chapter(Syntax differences)
@pagefooting(immediate,right "Syntax differences")

The syntax of CROSS is more compatible with that of MACRO-11 than
that of most manufacturer's assemblers.  This means that you
will not be able to compile straight 8080, Z80, 6502 or 6800
code with this assembler.  However, the transliterations are
reasonably straightforward and are described for each 
machine in the appendices.  In general, you must specify
registers with a %-directive.

The machine which differs most from the manufacturer's specification
of an assembler syntax is the Zilog Z80.  This is because CROSS
implements the Z80 syntax as a superset of the 8080 syntax.
Consequently, the syntax of most operations follows that of the 8080.
In addition, some Z80 mnemonics conflicted with 8080 mnemonics; the
Z80 has been assigned new mnemonics where these conflicts existed.
Any Z80 operation which has no 8080 counterpart has also been assigned
a mnemonic; some correspond to the Zilog specification (wherever this
was possible) and most do not.
Consequently, a complete cross-reference between the Zilog syntax
and the CROSS transliteration has been provided.

@chapter(Operating procedures)@label(ops)
@pagefooting(immediate,right "Operation")



@sec(Loading CROSS)

CROSS is run by typing the monitor command:

@enter(example)
@@CROSS			;tops20
.R CROSS		;tops10
@leave(example)

@sec(Initial dialogue)

When the assembler is ready to accept the user's command string,
it types an asterisk.  The user must now type the command string
on the same line.

The general form of the command string is:

@enter(example)
@center<binary output, listing output ← source input(s)>
@leave(example)
@index(@@, in command)
@index(CCL file)
@index(Extension .CCL)

In addition, the command(s) may be stored in a file (default
extension .CCL) and read in by specifying:
@example(
@@filename
)

Each input/output specification consists of the group:

@index(Command line)
@enter(example)
@center<dev:filnam.Ext[proj.,prog.]/switch:arg>
@leave(example)

@enter(itemize)
dev is:

@enter(description)
@index(DSK, device)
@b[DSK]        for disk

@index(PTR, device)
@b[PTR]        for paper tape reader

@index(PTP, device)
@b[PTP]        for high speed punch

@index(TTY, device)
@b[TTY]        for the user's teletype

@index(LPT, device)
@b[LPT]        for a queued line printer

@leave(description)
If not specified, the device is assumed to be the
disk.  Other system devices may also be used, depending
upon the system configuation.

filnam is the file name of the appropriate file.

ext is the file name extension for that file.
If is not specified, the assumptions are:

@enter(descriptioN)
@index(BIN, extension)
@index(Extension .BIN)
binary string:      .BIN (absolute)

@index(LST, extension)
@index(Extension .LST)
listing string:    .LST

source string:     
@enter(description)
@index(M65, extension)
@index(Extension .M65)
.M65   (MOS 6502)

@index(Extension .M68)
@index(M68, extension)
.M68   (Motorola 6800)

@index(M80, extension)
@index(Extension .M80)
.M80   (8080/Z80/8085)

@index(M88, extension)
@index(Extension .M88)
.M88   (8008 , 8080 mnemonics)

@index(M08, extension)
@index(Extension .M08)
.M08   (8008 , Intel mnemonics)

@index(M18, extension)
@index(Extension .M18)
.M18   (CPD1802 , COSMAC)

@index(MF8, extension)
@index(Extension .MF8)
.MF8   (Fairchild F8) [future]
@leave(description)
@leave(description)

[proj.,prog.] is the project-programmer number assigned
for the disk area to be used.  If not specified, the
user's local area is assumed.  Once specified, the
number pair becomes the new default assumption for the
following files. (Use translate command on TOPS20)
At CMU, the CMU PPN format is accepted.

Switches are specified by preceding each with a slash
character.  Switch arguments are preceded by colons.
In addition to explicit specifications of the switches, a
default set of switches may be specified with a SWITCH.INI
file (chapter @ref(switches), page @pageref(switches)).


@enter(description)
@index(Switch M65)@indexentry(key "M65",entry "/M65",number)
@index(6502)
@index(MOS 6502)
@index(/M65)

@b[/M65]   source is 6502 code

@index(Switch M68)@indexentry(key "M68",entry "/M68",number)
@index(/M68)
@index(6800)
@index(Motorola 6800)
@b[/M68]        source is 6800 code

@index(Switch M80)@indexentry(key "M80",entry "/M80",number)
@index(/M80)
@index(8080)
@index(Z80)
@index(Zilog Z80)
@index(Intel 8080)
@index(Intel 8085)
@index(8085)
@b[/M80]        source is 8080, 8085 or Z80 code

@index(Intel 8008)
@index(Switch M88)@indexentry(key "M88",entry "/M88",number)
@index(8008)
@index(/M88)
@b[/M88]        source is 8008 using 8080 compatible mnemonics

@index(Intel 8008)
@index(Switch M08)@indexentry(key "M08",entry "/M08",number)
@index(8008)
@index(/M08)
@b[/M08]        source is 8008 original Intel mnemonics

@index(/M18)
@index(Switch M18)@indexentry(key "M18",entry "/M18",number)
@index(COSMAC 1802)
@index(RCA 1802)
@index(1802)
@b[/M18]   source is 1802 code (RCA COSMAC)

@index(MF8)
@index(/MF8)
@index(Fairchild F8)
@index(F8)
@b[/MF8]        source is Fairchild F8 [future]

@index(/LI)
@index(Switch LI)@indexentry(key "LI",entry "/LI",number)
@index(.LIST)@indexentry(key "LIST",entry ".LIST",number)
@b[/LI]        simulate .LIST directive (see chapter @ref(listing)).

@index(Switch NL)@indexentry(key "NL",entry "/NL",number)
@index(/NL)
@index(.NLIST)@indexentry(key "NLIST",entry ".NLIST",number)
@b[/NL]           simulate .NLIST directive (see chapter @ref(listing)).

@index(/EN)
@index(Switch EN)@indexentry(key "EN",entry "/EN",number)
@index(.ENABL)@indexentry(key "ENABL",entry ".ENABL",number)
@b[/EN]           simulate .ENABL directive (see chapter @ref(enable)).

@index(/DS)
@index(Switch DS)@indexentry(key "DS",entry "/DS",number)
@index(.DSABL)@indexentry(key "DSABL",entry ".DSABL",number)
@b[/DS]           simulate .DSABL directive (see chapter @ref(enable)).

@index(Switch CRF)@indexentry(key "CRF",entry "/CRF",number)
@index(/CRF)
@index(Cross-reference)
@b[/CRF]        append cross reference table to the listing
files (see chapter @ref(listing)).

@index(/PTP)
@index(Switch PTP)@indexentry(key "PTP",entry "/PTP",number)
@index(Output format)
@index(Hex output)
@b[/PTP]        binary output is ASCII coded hex

@index(/N)
@index(Switch N)@indexentry(key "N",entry "/N",number)
@index(Error message suppression)
@b[/N]           suppress error messages and expanded summary
to the teletype.

@index(/OCT)
@index(Radix 8)
@index(Octal radix)
@index(Switch OCT)@indexentry(key "OCT",entry "/OCT",number)

@b[/OCT]        listing format in octal - hex is default

@index(Image mode output)
@index(Switch I)@indexentry(key "I",entry "/I",number)
@index(/I)
@b[/I]           output binary in image mode (one byte per
36 bit PDP-10 word). This switch must be used
to copy directly to paper tape.

@index(Packed binary output)
@index(/P)
@index(Switch P)@indexentry(key "P",entry "/P",number)

@b[/P]              pack binary output.  This is the default
case and the switch is not needed.

@index(Switch CDR)@indexentry(key "CDR",entry "/CDR",number)
@index(/CDR)
@index(72, column)
@index(Card reader simulation)

@b[/CDR]           simulate card reader input.  This is actually
independent of the physical input device but
causes the assembler to ignore all characters on
a column after the 72nd.

@index(/SOL)
@index(Switch SOL)@indexentry(key "SOL",entry "/SOL",number)
@index(Line numbers)

@b[/SOL]        sequence output lines (see chapter @ref(listing)).

@index(/GNS)
@index(Switch GNS)@indexentry(key "GNS",entry "/GNS",number)
@index(Generate new source)
@index(New source, generation)
@index(Source, new, generation)

@b[/GNS]        generate new source (see chapter @ref(listing)).

@index(/NSQ)
@index(Switch NSQ)@indexentry(key "NSQ",entry "/NSQ",number)

@b[/NSQ]        suppress listing of PDP-10 style seq. Numbers.

@index(/EQ)
@index(Switch EQ)@indexentry(key "EQ",entry "/EQ",number)

@b[/EQ]           equate the following symbols to zero.  This is
a method for introducing conditional arguments
without creating special parameter tapes.
"/EQ:sym1:sym2"  is the equivalent of the source
statements "sym1=0" and "sym2=0".
@leave(description)
@leave(itemize)
@chap(Listing control)@label(listing)
@pagefooting(immediate,right ".LIST/.NLIST")



CROSS has two categories of listing controls:  MACRO-11
compatible, which may be specified either in source statements or
in the command string, and a superset which is limited to the
command string.


@sec(Source statement listing control)

Listings are controlled at source statement level through
@index(.LIST)@indexentry(key "LIST",entry ".LIST",number) @index(.NLIST)@indexentry(key "NLIST",entry ".NLIST",number)
the use of the .LIST and .NLIST directives.  These are complementary
in that any function which can be enabled by a .LIST can be disabled
by a .NLIST.  To reduce redundancy, the following descriptions will
emphasize the .LIST while implying the .NLIST complement.

The following are the allowable arguments for the .LIST
directive along with the default settings (li for .LIST and nl for
.NLIST):

The first group controls intra-line listing.  Suppression of
any of these will cause the assembler to utilize the space by
moving the remainder of the line over.


@enter(descriptioN)
@index(SEQ, listing option)
@index(Listing option SEQ)
@b[SEQ]        list the sequence numbers.  These numbers represent
the source line numbers and are replaced by the nesting level
in parentheses for generated lines (macros, etc.).

@index(LOC, listing option)
@index(Listing option LOC)
@b[LOC]        list the value of the location counter.

@index(Listing option BIN) @index(BIN, listing option)
@b[BIN]        list the binary code generated by the assembler.

@index(SRC, listing option) @index(Listing option SRC)
@index(Source listing option)

@b[SRC]        list the source statement.  This is included primarily
for completeness.

@index(Listing option COM) @index(COM, listing option)
@index(Comment listing option)

@b[COM]        list the comment field.

@index(Listing option BEX) @index(BEX, listing option)
@index(Binary listing option)
@b[BEX]        list binary code which requires more than one listing line.
suppression of this is particularly useful in reducing the
length of listing required for long .ASCII strings.

@leave(description)

The following arguments pertain to entire statements:

@enter(descriptioN)
@index(MB, listing option) @index(Listing option MB)
@index(Macro call listing option)

@b[MB]        list macro binary and call only - no source

@index(MD, listing option) @index(Listing option MD)
@index(Macro call listing option)

@b[MD]   list macro definitions.

@index(MC, listing option) @index(Listing option MC)
@index(Macro call listing option)

@b[MC]   list macro calls.

@index(ME, listing option) @index(Listing option ME)
@index(Macro call listing option)

@enter(multiple)
@b[ME] -nl   list macro expansions.  The default causes the expansion
to be suppressed in the interest of supply economy.  ME
controls all generated text (.MACRO's, .REPT's, and .IRP's).

Caution - due to their dual nature, .REPT's and .IRP's qualify
both as definitions and calls.  CROSS treats MD and MC as a
pair in these cases, suppressing the listing if either is set.
@leave(multiple)


@index(CND, listing option) @index(Listing option CND)
@index(Conditional listing option)

@b[CND]        list conditionals.  Suppression causes unsatisfied
conditionals and all conditional directives (whether satisfied
or not) to be not listed.

@index(SYM, listing option) @index(Listing option SYM)
@index(Symbol table listing option)

SYM   append a symbol table to the listing file.

@index(TTM, listing option) @index(Listing option TTM)
@index(Teletype format listing option)

@b[TTM]        list in teletype format (one column of binary to a line,
truncation after 72 columns).  Default setting is determined
by the output device specified:  enabled if the physical device
is TTY: and disabled (line printer mode) in all other cases.

@index(TOC, listing option)
@index(Contents, listing option)
@index(Listing option TOC)
@index(Table of contents, listing option)

@b[TOC]-nl   list a table of contents during pass one.  This consists
of the .SBTTL directives being listed at the beginning of
the listing file.  Each line consists of the line number and all
text to the right of the .SBTTL directive.

@index(LD, listing option)
@index(Listing option LD)

@b[LD]-nl   list listing directives.  Specifically, this causes all
.LIST/.NLIST directives which have no arguments to be listed.
its primary use is in debugging listing control.
@leave(description)
.LIST and .NLIST directives with no arguments perform an over-
ride function.  They control a listing "level" which is
decremented for each .NLIST and incremented for each .LIST.  The
level count is used as a three way switch:

@enter(enumerate)
Zero (initial condition):  no special action.

Less than zero:  unconditionally suppress the listing
except for lines containing errors.

Greater than zero:  list unconditionally.

@leave(enumerate)
@index(.LIST)@indexentry(key "LIST",entry ".LIST",number) @index(.NLIST)@indexentry(key "NLIST",entry ".NLIST",number)
.LIST/.NLIST are normally paired to return the level count to zero.
the .NLIST/.LIST sequence is used to suppress a range which is
normally listed, while the .LIST/.NLIST sequence is used to
over-ride a range which is normally suppressed, such as in a macro
expansion.  The level count allows macro expansions to use the
listing control and return it to its previous state.
@sec(Command string equivalents)

The command string contains the equivalent of all the above
.LIST and .NLIST functions as well as some that are not available at
source level.  Indeed, many of the source level arguments are of primary
interest at command string level but can be used in the source
to modify default settings.

@index(Switch LI)@indexentry(key "LI",entry "/LI",number) 
@index(/LI) 
@index(Switch NL)@indexentry(key "NL",entry "/NL",number) @index(/NL)
The command string equivalents of .LIST and .NLIST are /LI
and /NL, respectively.  Arguments are specified by preceding them
with colons.  Thus /NL:bex:cnd is the equivalent of .NLIST  CND,BEX.

In all cases, command string switches override their source
level equivalents (as well as previous occurrences in the command
string).  Effectively, specification of a function in a command string
will cause all its source level equivalents (and their
complements) to be ignored.  i.e. /LI:me would enable the listing
of macro expansions and cause all ".LIST/.NLIST ME"  directives
to be ignored.

/LI (no arguments) causes everything to be listed, while /NL
suppresses the listing of all but error lines, the symbol table, and
the cross reference tables.
@sec(Other listing controls)

The following swithces are specified in output side of the
command string by preceding the mnemonic by a slash:

@enter(description)
@index(/OCT) 
@index(Switch OCT)@indexentry(key "OCT",entry "/OCT",number)

@b[/OCT]   list in octal - default is hex

@index(/N)
@index(Switch N)@indexentry(key "N",entry "/N",number)

@b[/N]        suppress error messages to the teletype (unless it is
also the listing device).


@index(Switch CRF)@indexentry(key "CRF",entry "/CRF",number) @index(/CRF)
@b[/CRF]        append a cross reference table to the listing
file.  Cross accomplishes this in the following manner:

@enter(enumerate)
The listing file is generated in the normal way
during pass two, using the name specified by the user.

@index(CRF.TMP file)
Simultaneously, a temporary file (xxxCRF.TMP, where
xxx is the job number) is created.  This contains
encoded cref information.

At the end of pass two, the temporary file is read
and the cref information is integrated into the symbol
table.

The references are appended to the listing file.
if insufficient core was available to build the table,
the process is repeated.  When through, the temporary 
file is deleted.
@leave(enumerate)
@enter(text)
The cross reference table format is as follows:

@enter(enumerate)
The symbol itself.

Its symbol table value, unless .NLIST sym was
specified.  Therefore the symbol table itself is
always pre-empted.

All references to the symbol, except that no more than
one reference to a given source line will be listed.
symbols in generated text always refer to the previous
source line.

@index(#, in cref)
Defining occurrences are flagged with a "#".

@index(*, in cref)
Destructive references are flagged with a "*".  These
are defined to be all symbols encountered in op-code
fields which store into a memory location or a register.

As many references per listing line as possible,
depending upon the "ttm" mode, are used.  This can be
increased by suppressing "sym".
@leave(enumerate)
@leave(text)

@index(Switch SOL)@indexentry(key "SOL",entry "/SOL",number)
@index(/SOL)
@b[/SOL]        Sequence output lines.  Listings are normally source
oriented:

@enter(enumerate)
Sequence numbers reflect the source line number.

Macro expansion lines have their nesting level, in
parentheses, in the sequence number field.

Lines containing nothing but a form feed are not
listed but cause the sequence number to be incremented.

Page numbers reflect physical input pages (incremented
only upon encountering a form feed).  Pages forced by
the assembler have a -n to reflect an extension page.
i.e.  If the assembler had encountered 3 form feeds and
was on its third listing page since the last one, it
would be "page 4-2".
@leave(enumerate)
when /SOL is specified, listings are output oriented:

@enter(enumerate)
Listed lines have consecutive numbers, except for
binary extensions.

Page numbers reflect the number of pages listed.
@leave(enumerate)
@index(/GNS)
@index(Switch GNS)@indexentry(key "GNS",entry "/GNS",number)
@index(Generate new source)
@index(New source, generation)
@index(Source, new, generation)

@b[/GNS]        Generate a new source.  This causes the listing file
to take on the appearance of a source file.
specifically, it:

@enter(enumerate)
Suppresses the listing of headers, error flags, summary
blocks, and any other output over which the user
otherwise would have no control.

Simulates a /NL:seq:loc:bin:bex:me.

therefore, by itself, it recreates the source file.  Normal usage
would have supplementary switches following it.  i.e. /gns/nl:md:mc
/li:me would replace macros, repeats, and irps by their generated
code, /gns/nl:cnd would purge conditionals, and /gns/li:seq would
be an expensive way of creating a sequence numbered listing
of the source file.
@leave(enumerate)
@leave(description)
@chap(Enable/Disable control)@label(enable)
@pagefooting(immediate,right ".ENABL/.DSABL")


As an alternative to the proliferation of directives, cross
@index(.ENABL)@indexentry(key "ENABL",entry ".ENABL",number) @index(.DSABL)@indexentry(key "DSABL",entry ".DSABL",number)
uses one complementary pair, .ENABL/.DSABL, with arguments.  Their
@index(Switch EN)@indexentry(key "EN",entry "/EN",number)
 @index(Switch DS)@indexentry(key "DS",entry "/DS",number)
 @index(/EN) @index(/DS)
command string equivalents are /EN and /DS.  The relationship
between command string and source statement specification, as well
as their argument specification, is the same as in .LIST/.NLIST.

@enter(descriptioN)
@index(M85)
@index(RIM, opcode) @index(SIM, opcode)

@b[M85]        allow 8085 opcodes (RIM/SIM) in .M80 files

@index(Z80)
@b[Z80]        allow z80 opcodes in .M80 files

@index(Floating point truncation)
@index(Truncation)
@index(FPT)
@b[FPT]        floating point truncation.  ".ENABL FPT" is
@index(.TRUNC)@indexentry(key "TRUNC",entry ".TRUNC",number)
equivalent to ".TRUNC" while ".DSABL FPT" is
@index(.ROUND)@indexentry(key "ROUND",entry ".ROUND",number)
equivalent to ".ROUND".

@index(ABS)
@b[ABS]        absolute assembly

@index(AMA)
@index(Absolute memory addressing)
@index(Memory addressing, absolute)
@b[AMA]        absolute memory addressing

@index(Switch NPP)@indexentry(key "NPP",entry "/NPP",number)
@b[NPP]        ".ENABL NPP" causes suppression of the output of
the following code, while ".DSABL NPP" causes its
resumption.


@index(ERF)
@index(Error flags, suppression)
@index(Suppression of error flags)

@b[ERF]        error flags can be selectively suppressed (or enabled)
by specifying ERF, directly followed by the selected
error characters.  "/ds:erfzm" would cause "m" and "z"
errors to be ignored, "/ds:erf"would cause all errors
to be ignored, and "/en:erfa" would cause"a" flags
(argument errors) to be flagged.

@index(LC)
@index(Lower case)
@b[LC]        lower case to upper case translation of input

@index(LSB)
@b[LSB]        local symbol block


@index(TIM)
@b[TIM]        timing information - causes number of states to be
output on the listing.

@index(REG)
@b[REG]        default register names
@leave(descriptioN)
@chap(User-defined switch defaults)@label(switches)
@pagefooting(immediate,right "SWITCH.INI")

CROSS is capable of accepting user-defined switch defaults.  Any
switches that are valid in a command string may be specified in a
@index(SWITCH.INI)
special file called SWITCH.INI.  When cross is run, it will look for
this file in the user's directory. If the file is not found, then
standard defaults (as defined elsewhere in this document) are assumed.
if SWITCH.INI is found, but no cross switches are found, default
settings are assumed.

To specify defaults, use the editor of your choice to create a file
called SWITCH.INI.  This file must contain a line of the following
format:

@example(
CROSS/switch1/switch2...../switchn
)

continuation lines are permitted.  Specifically, a line containing a
terminal hyphen is assumed to be followed by a continuation line.

Of course CROSS does not consider the hyphen to be a part of any switch.



Note that this feature is a subset of the facility offered normally
by use of SWITCH.INI files.

@appendix(8080 syntax)
@index(8080)
@index(Intel 8080)
@pagefooting(immediate,right "8080")
@label(M8080)

@AppendixSection(Machine State)

The registers for the 8080 are defined as:
@enter(itemize,spread 0)
@b[%A] - the accumulator

@b[%B] - register B

@b[%C] - register C

@b[%D] - register D

@b[%H] - register H, high-order memory reference register

@b[%L] - register L, low-order memory reference register

@b[%SP] - the stack pointer register

@b[%PSW] - the processor status, or F register
@leave(itemize)

Register pairs are written in the description of each instruction
by concatenating two names, e.g., %H%L is the 16-bit value in
the HL register pair.  Parentheses are sometimes added for visual
clarity, e.g., ".(%H%L)".
  The flags in the status register are
represented by:
@enter(itemize,spread 0)
c - the carry bit

p - the parity bit.  True if the last operation  had odd parity, false if even parity.

z - the zero bit.  True if the last operation  had a zero result.

s - the sign bit.  True if the last operation had a negative result.

ie - the interrupt enable flag.
@leave(itemize)

In each description of an instruction that alters the condition codes,
either an explicit assignment is written (e.g., "c←0") or the condition
codes are listed in curly brackets.  In this case, it is implied that
c is set to indicate carry or borrow (arithmentic operations), z is
set if the result is zero, s is set if the result is negative, and
p is set if the parity is even.

@AppendixSection(Notation)
To reduce the size of the description, several notational
conventions will be established for desribing the operands:

@enter(itemize)

@i<i> - represents an immediate operand
which is 8 bits wide.

@i<m> - represents a memory operand which
is 16 bits wide.

M - represents an implied memory operand addressed by the
register pair %H%L.


MEM - represents all of addressible memory.

DEV - represents all addressible devices.

@i<v> - a special 3-bit value used for the RST instruction

@i<opnd> - a general operand, either register or implied memory.  For
registers, it will be expressed as @i<%r> for one of the
8-bit registers, and for memory it will be expressed as
M in the instruction syntax and MEM[.(%H%L)] in the
description of the instruction.

@i<%rp> - a register pair from the set {%B%C, %D%E, %H%L %SP}.
These would be written, in the assembler, as %B, %D, %H or %SP.

@i<%rpn> - a register pair from the set {%PSW, %A, %B%C, %D%E, %H%L}.
Written as %PSW, %B, %D or %H.
@leave(itemize)
@AppendixSection(Opcodes)

The opcodes that are recognized for the 8080 are shown below.
The function is given in a BLISS-like notation (the dot operator
means "contents of").  
@enter(oplist)
ACI @i<i>      %A ← .%A + @i<i> + .c; {c,z,s,p}

ADC @i<opnd>      @t<%A ← .%A + @i<opnd> + .c>

ADD @i<opnd>      %A ← .%A + .@i<opnd>; {c,z,s,p}

ADI @i<i>      %A ← .%A + @i<i>; {c,z,s,p}

ANA @i<opnd>      %A ← .%A and .@i<opnd>;  c ← 0; {z,s,p}

ANI @i<i>      %A ← .%A + @i<i>; c ← 0; {z,s,p}

CALL @i<m>      MEM[.%SP-1], MEM[.%SP-1] ← .pc;  %SP ← .%SP - 2; pc ← @i<m>;

CC @i<m>      if .c then CALL @i<m>

CM @i<m>      if .s then CALL @i<m>

CMA       %A ← not .%A; {note: c,z,s,p not changed}

CMC      c ← not .c


CMP @i<opnd>      .%A - .@i<opnd>; {c,z,s,p}

CNC @i<m>      if not .c then CALL @i<m>

CNZ @i<m>      if not .z then CALL @i<m>

CP @i<m>      if not .s then CALL @i<m>

CPE @i<m>      if .p then CALL @i<m>

CPI @i<i>      .%A - @i<i>; {c,z,s,p}

CPO @i<m>      if not .p then CALL @i<m>

CZ @i<m>      if .z then CALL @i<m>

DAA      %A ← DecimalAdjust(.%A); {c,z,s,p}

DAD %B      %H%L ← .(%H%L) + .(%B%C); {c}

DAD %D      %H%L ← .(%H%L) + .(%D%E); {c}

DAD %SP      %H%L ← .(%H%L) + .%SP; {c}

DCR @i<opnd>      @i<opnd> ← .@i<opnd> - 1; {z,s,p}


DCX @i<%rp>      @i<%rp> ← .(@i<%rp>) - 1

DI      ie ← 0

EI      ie← 1;

HLT

IN @i<i>      %A ← .DEV[@i<i>];


INR @i<opnd>      @i<opnd> ← .@i<opnd> + 1; {z,s,p}

INX @i<%rp>      @i<%rp> ← .(@i<%rp>) + 1;

JC @i<m>      if .c then pc ← @i<m>;

JM @i<m>      if .s then pc ← @i<m>;

JMP @i<m>      pc ← @i<m>;

JNC @i<m>      if not .c then pc ← @i<m>;

JNZ @i<m>      if not .z then pc ← @i<m>;

JP @i<m>      if not .s then pc ← @i<m>;

JPE @i<m>      if .p then pc ← @i<m>;

JPO @i<m>      if not .p then pc ← @i<m>;

JZ @i<m>      if .z then pc ← @i<m>;

LDA @i<m>	%A ← .MEM[@i<m>];

LDAX %B      %A ← .MEM[.(%B%C)];

LDAX %D      %A ← .MEM[.(%D%E)];

LHLD @i<m>      %H ← .MEM[@i<m>]; %L ← .MEM[@i<m>+1];

LXI @i<%rp>,@i<m>      @i<%rp> ← @i<m>;

MOV @i<%r1>,@i<%r2>      @i<%r1> ← .@i<%r2>;

MOV @i<m>,@i<%r>      MEM[@i<m>] ← .@i<%r>;

MOV @i<%r>,@i<m>      @i<%r> ← .MEM[@i<m>];


MVI @i<opnd>,@i<i>      @i<opnd> ← @i<i>;

NOP      ;

ORA @i<opnd>      %A ← .%A or .@i<opnd>; c ← 0; {z,s,p}

ORI @i<i>      {%A ← .%A or @i<i>;}; c ← 0; {z,s,p}

OUT @i<i>	DEV[@i<i>] ← .%A;

PCHL      pc ← .(%H%L);

POP @i<%rpn>       @i<%rpn> ← .MEM[.%SP], .MEM[.%SP + 1]; %SP ← .%SP + 2;

PUSH @i<%rpn>      %SP ← .%SP - 2; MEM[.%SP], MEM[.%SP + 1] ← .@i<%rpn>;

RAL      c%A ← .(c%A) ↑ 1;

RAR      c%A ← .(c%A) ↑ -1;

RC      if .c then RET;

RET      pc ← .MEM[.%SP], .MEM[.%SP+1]); %SP←.%SP + 2;

RLC      c ← .%A<7,1>; %A ← .%A ↑ 1

RM      if .s then RET;

RNC      if not .c then RET;

RNZ      if not .z then RET;

RP      if not .s then RET;

RPE      if .p then RET;

RPO      if not .p then RET;

RRC      c ← .%A<0,1>; %A ← .%A ↑ -1;

RST @i<v>      CALL @i<v> ↑ 8;

RZ      if .z then RET;

SBB @i<opnd>      %A ← .%A - .@i<opnd> - .c; {c,z,s,p}

SBI @i<i>      %A ← .%A - @i<i> - .c; {c,z,s,p}

SHLD @i<m>      MEM[@i<m>] ← .%H; MEM[@i<m>+1] ← .%L;

SPHL      %sp ← .(%H%L);

STA @i<m>      MEM[@i<m>] ← .%A;

STAX %B      MEM[.(%B%C)] ← .%A;

STAX %D      MEM[.(%D%E)] ← .%A;

STC      c ← 1;

SUB @i<opnd>      %A ← .%A - .@i<opnd>; {c,z,s,p}

SUI @i<i>      %A ← .%A - @i<i>; {c,z,s,p}

XCHG      %D <=> %H; %E <=> %L;

XRA @i<opnd>      %A ← .%A xor .@i<opnd>; c ← 0; {z,s,p}

XTHL      MEM[.%SP - 1] <=> %H; MEM[.%SP] <=> %L;



@leave(oplist)
@appendix(Z80 syntax)
@index(Z80)
@index(Zilog Z80)
@pagefooting(immediate,right "Z80")

@AppendixSection(Introduction)

The Z80 portion of CROSS is not intended to correspond to the
Zilog syntax; instead, it is treated as an extension of the
8080 operations described in section @ref(M8080).  This means
that new opcode designators have been invented where appropriate.
@AppendixSection(Machine State)

The Z80 registers are designated exactly like the 8080 registers,
with the following additions:

@enter(itemize)
@b[%X] - index register X (16 bits)

@b[%Y] - index register Y (16 bits)

@b[iv] - the interrupt vector base address (8 bits)

@b[ra] - the dynamic RAM refresh address (8 bits)
@leave(itemize)

@AppendixSection(Notation)
The following notational extensions are made to the 8080 description:
@enter(itemize)
@i<b> - A bit position, 0-7, for bit operations

@i<opnd> - In addition to @i<%r> and M, indexed operands are permitted
for all instructions which use @i<opnd>; these are expressed
to the assembler as @i<d>(X) or @i<d>(Y), where @i<d> is an
8-bit displacement.
In the description, they are interpreted as ".%X+@i<d>" or ".%Y+@i<d>".

@i<%rpx> - Register pair including %X, i.e., {%B%C, %D%E, %X, %SP}

@i<%rpy> - Register pair including %Y, i.e., {%B%C, %D%E, %Y, %SP}

@leave(itemize)

@AppendixSection(Opcodes)
The extended opcodes for the Z80 are given below.  Those which
are underlined are mnemonics which are neither 8080 instructions nor
those defined by Zilog for the Z80; they have been invented for CROSS.
A complete transliteration from Zilog assembler format to CROSS
syntax is given in section @ref(translit).
@enter(oplist)
BIT @i<b>,@i<opnd>      z ← not .@i<opnd><@i<b>,1>

@u[CCD]    @w{.%A - .MEM[.(%H%L)];}  @w{%H%L ← .(%H%L) - 1;} @w{%BC ← .(%B%C) - 1;} {z,s,p}

@u[CCDR]   until @w{.%A = .MEM[.(%H%L)]} @w{or .(%B%C) = 0} do begin @w{.%A - .MEM[.(%H%L)];} @w{%H%L ← .(%H%L) - 1;} @w{%B%C ← .(%B%C) - 1} end; {c,z,p}

@u[CCI]    @w{.%A - .MEM[.(%H%L)];} @w{%H%L ← .(%H%L) + 1;} @w{%BC ← .(%B%C) - 1;} {z,s,p}

@u[CCIR]   until @w{.%A = .MEM[.(%H%L)]} @w{or .(%B%C) = 0} do begin @w{.%A - .MEM[.(%H%L)];} @w{%H%L ← .(%H%L) + 1;} @w{%B%C ← .(%B%C) - 1} end; {c,z,p}

@u[CNO]   CPO;

@u[CO]   CPE;

@u[DADC] @i<%rp>	%HL ← .(%HL) + .@i<%rp> + .c; {c,z,n,p} 

@u[DADX] @i<%rpy>	%X ← .%X + .@i<%rpy>; {c,n}

@u[DADY] @i<%rpx>   %Y ← .%Y + .@i<%rpx>; {c,n}

DJNZ @i<i>    if .%B @k(neq) 0 then pc ← .pc + 2 + @i<i>

@u[DSBC] @i<%rp>      %H%L ← .%H%L - .@i<%rp> - .c; n ← 1; p ← 0; {c,z}

@u[EXAF]      %A%PSW <=> %A'%PSW';

EXX      %B%C <=> %B'%C'; %D%E <=> %D'%E'; %H%L <=> %H'%L'

@u[IM0]		im ← 0;

@u[IM1]		im ← 1;

@u[IM2]      im ← 2;

IND

INDR

INI

INIR

INP

@u[JMPR] @i<i>      pc ← .pc + 2 + @i<i>;

@u[JNO] @i<m>      JPO @i<m>;

@u[JO] @i<m>      JPE @i<m>;

@u[JRC] @i<i>      if .c then JR @i<i>;

@u[JRNC] @i<i>      if not .c then JR @i<i>;

@u[JRNZ] @i<i>      if not .z then JR @i<i>;

@u[JRZ] @i<i>      if .z then JR @i<i>;

@u[LBCD] @i<m>      %B%C ← .MEM[@i<m>];

@u[LDAI]      %A ← .iv;

@u[LDAR]       %A ← .ra;

LDD      @w{MEM[.(%D%E)] ← .MEM[.(%H%L)];} @w{%D%E ← .(%D%E) - 1;} @w{%H%L ← .(%H%L) - 1;} @w{%B%C ← .(%B%C) - 1;} @w{n ← 0;}

LDDR	until @w{.(%B%C) = 0} do begin @w{MEM[.(%D%E)] ← .MEM[.(%H%L)];} @w{%D%E ← .(%D%E) - 1;} @w{%H%L ← .(%H%L) - 1;} @w{%B%C ← .(%B%C) - 1;} end;

@u[LDED] @i<m>      %D%E ← .MEM[@i<m>];

LDI      @w{.MEM[.(%D%E)] ← .MEM[.(%H%L)];} @w{%D%E ← .(%D%E) + 1;} @w{%H%L ← .(%H%L) + 1;} @w{%B%C ← .(%B%C) - 1;} {p}

LDIR	until @w{.(%B%C) = 0 do} begin @w{MEM[.(%D%E)] ← .MEM[.(%H%L)];} @w{%D%E ← .(%D%E) + 1;} @w{%H%L ← .(%H%L) + 1;} @w{%B%C ← .(%B%C) - 1;} end;

@u<LIXD> @i<m>      %X ← .MEM[@i<m>+1], .MEM[@i<m>];

@u[LIYD] @i<m>      %Y ← .MEM[@i<m>+1], .MEM[@i<m>];

@u[LSPD] @i<m>      %SP ← .MEM[@i<m>+1], .MEM[@i<m>];

NEG     %A ← - .%A; p ← 0; {c,z,s}

OUTD

OUTDR

OUTI

OUTIR

OUTP

@u[PCIX]      pc ← .%X;

@u[PCIY]    pc ← .%Y;

RALR

RARR

RES @i<b>,@i<opnd>      %opnd<@i<b>,1> ← 0;

RETI      @i<return from interrupt>

RETN      @i<return from nonmaskable interrupt>

RLCR

RLD    @i<decimal arithmetic>

@u[RNO]     RPO;

@u[RO]   RPE;

RRCR

RRD   @i<decimal arithmetic>

@u[SBCD] @i<m>   MEM[@i<m>] ← .(%B%C);

@u[SDED] @i<m>   MEM[@i<m>] ← .(%D%E);

SET @i<b>,@i<opnd>   @i<opnd><@i<b>,1> ← 1;

@u[SIXD] @i<m>    MEM[@i<m>] ← .%X;

@u[SIYD] @i<m>    MEM[@i<m>] ← .%Y;

@u[SLAR]

@u[SPIX]      %SP ← .%X;

@u[SPIY]    %SP ← .%Y;

@u[SRAR]

@u[SRLR]

@u[SSPD] @i<m>      MEM[@i<m>] ← .%SP;

@u[STAI]      iv ← .%A;

@u[STAR]      ra ← .%A;

@u[XTIX]      %X <=> MEM[.%SP];

@u[XTIY]      %Y <=> MEM[.%SP];

@leave(oplist)
@AppendixSection(Z80 Transliterations)@label(translit)
@index(Z80 transliteration)
@pagefooting(immediate,right "Z80 transliterations")

The following transliterations are necessary because of the
differences between the Zilog definition of the instructions
and the CROSS syntax.  This is indexed alphabetically by the
Zilog operations in order to facilitate translation of Zilog
assembly programs to CROSS.
@enter(format,facecode t)
@tabs(15)
@i[Zilog]@\@i[Cross]
ADC @i<i>@\ACI @i<i>
ADC (HL)@\ADC M
ADC HL,@i<rp>@\DADC @i<%rp>
ADC (IX+@i<d>)@\ADC @i<d>(X)
ADC (IY+@i<d>)@\ADC @i<d>(Y)
ADC @i<r>@\ADC @i<%r>
ADD @i<i>@\ADI @i<i>
ADD (HL)@\ADD M
ADD HL,@i<rp>@\DAD @i<%rp>
ADD (IX+@i<d>)@\ADD @i<d>(X)
ADD (IY+@i<d>)@\ADD @i<d>(Y)
ADD @i<r>@\ADD @i<%r>
AND @i<i>@\ANI @i<i>
AND (HL)@\ANA M
AND (IX+@i<d>)@\ANA @i<d>(X)
AND (IY+@i<d>)@\ANA @i<d>(Y)
AND @i<r>@\ANA @i<%r>
BIT @i<b>,(HL)@\BIT @i<b>,M
BIT @i<b>,(IX+@i<d>)@\BIT @i<b>,@i<d>(X)
BIT @i<b>,(IY+@i<d>)@\BIT @i<b>,@i<d>(Y)
CALL @i<m>@\CALL @i<m>
CALL C,@i<m>@\CC @i<m>
CALL M,@i<m>@\CM @i<m>
CALL NC,@i<m>@\CNC @i<m>
CALL NZ,@i<m>@\CNZ @i<m>
CALL NZ,@i<m>@\CNZ @i<m>
CALL P,@i<m>@\CP @i<m>
CALL PE,@i<m>@\CPE @i<m>
CALL PO,@i<m>@\CPO @i<m>
CALL Z,@i<m>@\CZ @i<m>
CCF@\CMC
CP @i<i>@\CPI @i<i>
CP (HL)@\CMP M
CP (IX+@i<d>)@\CMP @i<d>(X)
CP (IY+@i<d>)@\CMP @i<d>(Y)
CP @i<r>@\CMP @i<%r>
CPD@\CCD
CPDR@\CCDR
CPI@\CCI
CPIR@\CCIR
CPL@\CMA
DAA@\DAA
DEC (HL)@\DCR M
DEC IX@\DCX %X
DEC IY@\DCX %Y
DEC (IX+@i<d>)@\DCR @i<d>(X)
DEC (IY+@i<d>)@\DCR @i<d>(Y)
DEC @i<rp>@\DCX @i<%rp>
DEC @i<r>@\DCR @i<%r>
DI@\DI
DJNZ @i<d>@\DJNZ @i<d>
EI@\EI
EX AF,AF'@\EXAF
EX DE,HL@\XCHG
EX (SP),HL@\XTHL
EX (SP),IX@\XTIX
EX (SP),IY@\XTIY
EXX@\EXX
HALT@\HLT
IM 0@\IM0
IM 1@\IM1
IM 2@\IM2
IN A,@i<i>@\IN @i<i>
IN @i<r>,(@i<c>)
INC (HL)@\INR M
INC IX@\INX %X
INC IY@\INX %Y
INC (IX+@i<d>)@\INR @i<d>(X)
INC (IY+@i<d>)@\INR @i<d>(Y)
INC @i<rp>@\INX @i<%rp>
IND@\IND
INDR@\INDR
INI@\INI
INIR@\INIR
JP @i<m>@\JMP @i<m>
JP M,@i<m>@\JM @i<m>
JP NC,@i<m>@\JNC @i<m>
JP NZ,@i<m>@\JNZ @i<m>
JP NZ,@i<m>@\JNZ @i<m>
JP P,@i<m>@\JP @i<m>
JP PE,@i<m>@\JPE @i<m>
JP PO,@i<m>@\JPO @i<m>
JP Z,@i<m>@\JZ @i<m>
JR @i<d>@\JMPR @i<d>
JR NC,@i<m>@\JRNC @i<m>
JR NZ,@i<m>@\JRNZ @i<m>
JR NZ,@i<m>@\JRNZ @i<m>
JR Z,@i<m>@\JRZ @i<m>
LD A,(@i<m>)@\LDA @i<m>
LD A,(BC)@\LDAX %B
LD A,(DE)@\LDAX %D
LD A,@i<i>@\MVI %A,@i<i>
LD A,@i<r>@\MOV %A,@i<%r>
LD (@i<m>),A@\STA @i<m>
LD (@i<m>),BC@\SBCD @i<m>
LD (@i<m>),DE@\SDED @i<m>
LD (@i<m>),HL@\SHLD @i<m>
LD (@i<m>),IX@\SIXD @i<m>
LD (@i<m>),IY@\SIYD @i<m>
LD (@i<m>),SP@\SSPD @i<m>
LD (BC),A@\STAX %B
LD (DE),A@\STAX %D
LD HL,(@i<m>)@\LHLD @i<m>
LD (HL),@i<i>@\MVI @i<i>
LD (HL),@i<r>@\MOV @i<%r>,M
LD I,A@\STAI
LD IX,(@i<m>)@\LIXD @i<m>
LD IX,@i<m>@\LXI %X,@i<m>
LD (IX+@i<d>),@i<i>@\MVI @i<i>,@i<d>(X)
LD (IX+@i<d>),@i<r>@\MOV @i<%r>,@i<d>(X)
LD IY,(@i<m>)@\LIYD @i<m>
LD IY,@i<m>@\LXI %Y,@i<m>
LD (IY+@i<d>),@i<i>@\MVI @i<i>,@i<d>(Y)
LD (IY+@i<d>),@i<r>@\MOV @i<%r>,@i<d>(Y)
LD @i<r>,A@\MOV @i<%r>,%A
LD @i<r>,@i<i>@\MVI @i<%r>,@i<i>
LD @i<r>,(HL)@\MOV @i<%r>,M
LD @i<r>,(IX+@i<d>)@\MOV @i<%r>,@i<d>(X)
LD @i<r>,(IY+@i<d>)@\MOV @i<%r>,@i<d>(Y)
LD @i<r>,@i<r>@\MOV @i<%r>,@i<%r>
LD BC,(@i<m>)@\LBCD @i<m>
LD DE,(@i<m>)@\LDED @i<m>
LD HL,(@i<m>)@\LHLD @i<m>
LD SP,(@i<m>)@\LSPD @i<m>
LD IX,(@i<m>)@\LIXD @i<m>
LD IY,(@i<m>)@\LIYD @i<m>
LD @i<rp>,@i<m>@\LXI @i<%rp>,@i<m>
LD SP,HL@\SPHL
LD SP,IX@\SPIX
LD SP,IY@\SPIY
LDD@\LDD
LDDR@\LDDR
LDI@\LDI
LDIR@\LDIR
NEG@\NEG
NOP@\NOP
OR @i<i>@\ORI @i<i>
OR (HL)@\ORA M
OR (IX+@i<d>)@\ORA @i<d>(X)
OR (IY+@i<d>)@\ORA @i<d>(Y)
OR @i<r>@\ORA @i<%r>
OUT (@i<i>),@i<r>@\
OUT @i<i>,A@\OUT @i<i>
OUTD@\OUTD
OUTDR@\OUTDR
OUTI@\OUTI
OUTIR@\OUTIR
POP IX@\POP %X
POP IY@\POP %Y
POP @i<rp>@\POP @i<%rp>
PUSH IX@\PUSH %X
PUSH IY@\PUSH %Y
PUSH @i<rp>@\PUSH @i<%rp>
RES @i<b>,(HL)@\RES @i<b>,M
RES @i<b>,(IX+@i<d>)@\RES @i<b>,@i<d>(X)
RES @i<b>,(IY+@i<d>)@\RES @i<b>,@i<d>(Y)
RES @i<b>,@i<r>@\RES @i<b>,@i<%r>
RET@\RET
RET M@\RM
RET NC@\RNC
RET NZ@\RNZ
RET NZ@\RNZ
RET P@\RP
RET PE@\RPE
RET PO@\RPO
RET Z@\RZ
RETI@\RETI
RETN@\RETN
RL (HL)@\RALR M
RL (IX+@i<d>)@\RALR @i<d>(X)
RL (IY+@i<d>)@\RALR @i<d>(Y)
RL @i<r>@\RALR @i<%r>
RLA@\RAL
RLC (HL)@\RLC M
RLC (IX+@i<d>)@\RLC @i<d>(X)
RLC (IY+@i<d>)@\RLC i<d>(Y)
RLC @i<r>@\RLC @i<%r>
RLCA@\RLC
RLD@\RLD
RR (HL)@\RARR M
RR (IX+@i<d>)@\RARR @i<d>(X)
RR (IY+@i<d>)@\RARR @i<d>(Y)
RR @i<r>@\RARR @i<%r>
RRA@\RAR
RRC (HL)@\RRC M
RRC (IX+@i<d>)@\RRC @i<d>(X)
RRC (IY+@i<d>)@\RRC @i<d>(Y)
RRC @i<r>@\RRC @i<%r>
RRCA@\RRC
RRD@\RRD
RST @i<v>@\RST @i<v>
SBC @i<i>@\SBI @i<i>
SBC (HL)@\SBC M
SBC HL,@i<rp>@\DSBC @i<%rp>
SBC (IX+@i<d>)@\SBC @i<d>(X)
SBC (IY+@i<d>)@\SBC @i<d>(Y)
SBC @i<r>@\SBC @i<%r>
SCF@\STC
SET @i<b>,(HL)@\SET @i<b>,M
SET @i<b>,(IX+@i<d>)@\SET @i<b>,@i<d>(X)
SET @i<b>,(IY+@i<d>)@\SET @i<b>,@i<d>(Y)
SET @i<b>,@i<r>@\SET @i<b>,@i<%r>
SLA (HL)@\SLAR M
SLA (IX+@i<d>)@\SLAR @i<d>(X)
SLA (IY+@i<d>)@\SLAR @i<d>(Y)
SLA @i<r>@\SLAR @i<%r>
SRA (HL)@\SRAR M
SRA (IX+@i<d>)@\SRAR @i<d>(X)
SRA (IY+@i<d>)@\SRAR @i<d>(Y)
SRA @i<r>@\SRAR @i<%r>
SUB @i<i>@\SUI @i<i>
SUB (HL)@\SUB M
SUB (IX+@i<d>)@\SUB @i<d>(X)
SUB (IY+@i<d>)@\SUB @i<d>(Y)
SUB @i<r>@\SUB @i<%r>
XOR @i<i>@\XRI @i<i>
XOR (HL)@\XRA M
XOR (IX+@i<d>)@\XRA @i<d>(X)
XOR (IY+@i<d>)@\XRA @i<d>(Y)
XOR @i<r>@\XRA @i<%r>
@leave(format)
@appendix(8008)
@index(8008) @index(Intel 8008)
@pagefooting(immediate,right "8008")
@label(M8008)

The 8008 is described by two different sets of opcodes.  The one set
is based upon the 8080 style of coding, and is a subset of the operations.
The other set is based upon the original set of 8008 mnemonics as
described by Intel.  Rather than give complete descriptions of these
operations, the user is referred back to the 8080 descriptions.  What
this section will give is a listing of the available operations and
a cross reference to the original 8008 mnemonics.

Note that the 8008 is "software compatible" with the 8080; the same
mnemonics will produce different bit patterns for the 8008 and the 8080.

@AppendixSection(8080 subset)

The instructions which are implemented for the 8008 are:

@enter(example)
@tabdivide(10)
ACI@\ADC@\ADD@\ADI@\ANA@\ANI@\CALL@\CC
CM@\CMP@\CNC@\CNZ@\CP@\CPE@\CPI@\CPO
CZ@\DCR@\HLT@\IN@\INR@\JC@\JM@\JMP
JNC@\JNZ@\JP@\JPE@\JPO@\JZ@\MOV
MVI@\NOP@\ORA@\ORI@\OUT@\RAL@\RAR
RC@\RET@\RET@\RLC@\RM@\RNC@\RNZ
RP@\RPE@\RPO@\RRC@\RST@\RZ@\SBB
SBI@\SUB@\SUI@\XRA@\XRI
@leave(example)

The set of original 8008 operations are defined as:
@enter(description,spread 0,facecode t)
@i<8080>      @i<Original 8008>

ADC      ACA, ACB, ACC, ACD, ACE, ACH, ACL

ACI      ACI

ADD      ADA, ADB, ADC, ADD, ADE, ADH, ADL

ADI      ADI

CALL     CAL

CNC      CFC

CPO      CFP

CM       CFS

CNZ      CFZ

CMP      CPA, CPB, CPC, CPD, CPE, CPH, CPL

CPI      CPI

CC       CTC

CPE      CTP

CP       CTS

CZ       CTZ

DCR      DCB, DCC, DCD, DCE, DCH, DCL

HLT      HLT

INR      INB, INC, IND, INE, INH, INL

IN       INP

JNC      JFC

JNZ      JFZ

JPO      JFP

JM       JFS

JMP      JMP

JC       JTC

JPE      JTP

JP       JTS

JZ       JTZ

MOV      LAA, LAB, LAC, LAD, LAE, LAH, LAL, LAM,
         LBA, LBB, LBC, LBD, LBE, LBH, LBL, LBM,
         LCA, LCB, LCC, LCD, LCE, LCH, LCL, LCM,
         LDA, LDB, LDC, LDD, LDE, LDH, LDL, LDM,
         LEA, LEB, LEC, LED, LEE, LEH, LEL, LEM,
         LHA, LHB, LHC, LHD, LHE, LHH, LHL, LHM,
         LLA, LLB, LLC, LLD, LLE, LLH, LLL, LLM

MVI      LAI, LBI, LCI, LDI, LEI, LHI, LLI, LMI

ANA      NDA, NDB, NDC, NDD, NDE, NDH, NDL, NDM

ANI      NDI

NOP      NOP

ORA      ORA, ORB, ORC, ORD, ORE, ORH, ORL, ORM

ORI      ORI

OUT      OUT

RAL,RAR   RAL, RAR

RET      RET

RNC      RFC

RPO      RFP

RP       RFS

RNZ      RFZ

RLC,RRC   RLC, RRC

SUB      SBA, SBB, SBC, SBD, SBE, SBH, SBL, SBM

SBI      SBI

SBC      SUA, SUB, SUC, SUD, SUE, SUH, SUL, SUM

SUI      SUI

XRA      XRA, XRB, XRC, XRD, XRE, XRH, XRL, XRM

@leave(description)
@appendix(1802) @label(RCA1802)
@index(RCA 1802) @index(COSMAC 1802) @index(1802)
@pagefooting(immediate, right "1802")
@AppendixSection(Machine State)
@enter(description)
D   The data register

DF   The "data flag" register, or carry

P   4-bit program counter pointer

X   4-bit data counter pointer

T   8-bit buffer for P and X

Q   Q-status output register
@leave(description)
@AppendixSection(Opcodes)
The operation codes recognized for the 1802 are:
@enter(oplist)
ADC   D ← .mem[.R[.X]] + .D + .DF

ADCI   D ← @i[data8] + .D + .DF

ADD   D ← .mem[.R[.X]] + .D

ADI   D ← @i[data8] + .D

AND

ANI

BDF   if .DF then R[P]<7,0> ← @i[adr8]

BGE

BL

BM

BNF

BNQ

BNZ

BN1

BN2

BN3

BN4

BPZ

BQ

BR

BZ

B1

B2

B3

B4

DEC @i[n]   R[@i[n]] ← .R[@i[n]] - 1;

DIS

GHI

GLO

IDL

INC @i[n]   R[@i[n] ← .R[@i[n]] + 1;

INP

IRX

LBDF

LBNF

LBNQ

LBNZ

LBQ

LBR

LBZ

LDA

LDI

LDN

LDX

LDXA

LSDF

LSIE

LSKP

LSNF

LSNQ

LSNZ

LSQ

LSZ

MARK

NBR

NLBR

NOP

OR

ORI

OUT

PHI

PLO

REQ

RET

RSHL

RSHR

SAV

SD

SDB

SDBI

SDI

SEP

SEQ

SEX

SHL

SHLC

SHR

SHRC

SKP

SM

SMB

SMBI

SMI

STR

STXD

XOR

XRI
@leave(oplist)
@appendix(6502) @label(M6502)
@index(MOS 6502) @index(6502)
@pagefooting(immediate,right "6502")

@AppendixSection(Machine state)

The machine state is represented by:
@enter(itemize)
c - The carry bit

z - The zero bit, true if result was zero

v - The overflow bit

s - The sign bit, true if result was negative

d - Decimal mode

i - Interrupt disable bit; 0 => interrupts enabled

b - Breakpoint flag; set by BRK instruction trap
@leave(itemize)

The machine registers are:

@enter(itemize)
ac - The single accumulator, 8 bits wide

x - 8 bit index register x, preindexes indirect addresses

y - 8 bit index register y, postindexes indirect addresses.

sp - 8 bit stack pointer.

psw - 8 bit processor status word.
@leave(itemize)

@AppendixSection(Notation)
The operands are expressed as:
@enter(itemize)
@i<opnd8> - 8 bit operand corresponding to one of 
the form:
@enter(itemize)
 @i<addr> - Base page direct (8 bit address).

 @i<addr>,X -  Base page indexed by x; @w{MEM[@i<addr> + .x]}.

 (@i<addr>,X) - Indexed indirect by x; @w{(.MEM[@i<addr> + .x])}.

(@i<addr>),Y - Indexed indirect by y; @w{(.MEM[@i<addr>] + .y)}.
@leave(itemize)


@i<opnd16> - Any of the following operands in the form:
@enter(itemize)
@i<addr> - Extended direct (16 bit address); MEM[@i<addr>].

@i<addr>,X - Absolute indexed via x; @w{MEM[@i<addr> + .x]}.

@i<addr>,Y - Absolute indexed via y; @w{MEM[@i<addr> + .y]}.
@leave(itemize)

@i<opnd> - Either @i<opnd8> or @i<opnd16>.

@i<i> - Immediate data, expressed as #@i<expression>.

@leave(itemize)
@AppendixSection(Syntax)
The syntax for operands is much like that specified by MOS Technology.
Immediate operands are indicated by preceding the operand with a
hash mark, #.

@AppendixSection(Opcodes)
The opcodes recognized for the Mos Technology 6502 are:
@enter(oplist)
ADC @i<opnd>      ac ← .ac + .@i<opnd> + .c; {s,z,c,v}

ADC @i<i>     ac ← .ac + @i<i> + .c; {s,z,c,v}

AND @i<opnd>      ac ← .ac and .@i<opnd>; {s,z}

AND @i<i>      ac ← .ac and @i<i>; {s,z}

ASL @i<opnd>       c,@i<opnd> ← @i<opnd> ↑ 1; {s,z,c}

BCC @i<d>       if not .c then pc ← .pc + 1 + @i<d>;

BCS @i<d>      if .c then pc ← .pc + 1 + @i<d>;;

BEQ @i<d>      if .z then pc ← .pc + 1 + @i<d>;;

BIT @i<opnd>      @w{.ac and .@i<opnd>;} @w{s ← (.ac and .@i<opnd>)<7,1>;} @w{v ← (.ac and .@i<opnd>)<6,1>;} {z}

BMI @i<d>      if .s then pc ← .pc + 1 + @i<d>;;

BNE @i<d>      if not .z then pc ← .pc + 1 + @i<d>;;

BPL @i<d>      if not .s then pc ← .pc + 1 + @i<d>;;

BRK      @w{MEM[.sp] ← .pc<0,8>;} @w{MEM[.sp + 1] ← .pc<8,8>;} @w{MEM[.sp + 2] ← .psw;} @w{sp ← .sp - 3;} @w{pc ← $FFFFFFFE;} @w{i ← 1;} @w{b ← 1;}

BVC @i<d>      if not .v then pc ← .pc + 1 + @i<d>;;

BVS @i<d>      if .v then pc ← .pc + 1 + @i<d>;;

CLC      c ← 0;

CLD     d ← 0;

CLI      i ← 0;

CLV      v ← 0;

CMP @i<opnd>      .ac - .@i<opnd>; {s,z,c}

CPX @i<opnd>      .x - .@i<opnd>; {s,z,c}

CPY @i<opnd>      .y - @i<opnd>; {s,z,c}

DEC      ac ← .ac - 1; {s,z}

DEX      x ← .x - 1; {s,z}

DEY      y ← .y - 1; {s,z}

EOR @i<opnd>      ac ← .ac - .@i<opnd>

INC     ac ← .ac + 1; {z,s}

INX      x ← .x + 1;

INY      y ← .y + 1;

JMP @i<m>      pc ← m;

JSR @i<m>      @w{MEM[.sp] ← .pc<8,8>;} @w{MEM[.sp - 1] ← .pc<0,8>;} @w{sp ← .sp - 2;} @w{pc ← @i<m>;}

LDA @i<opnd>      ac ← .@i<opnd>; {s,z}

LDX @i<opnd>      x ← .@i<opnd>; {s,z}

LDY @i<opnd>      y ← .@i<opnd>; {s,z}

LSR      ac,c ← .ac,0 ↑ -1;

NOP      ;

ORA @i<opnd>       ac ← .ac or @i<opnd>; {s,z}

PHA      MEM[.sp] ← .ac; sp ← .sp - 1;

PHP      MEM[.sp] ← .psw; sp ← .sp - 1;

PLA      @w{ac ← .MEM[.sp + 1];} @w{sp ← .sp + 1;}

PLP      @w{psw ← .MEM[.sp + 1];} @w{sp ← .sp + 1;}

ROL @i<opnd>      c,.MEM[@i<opnd>] ← c,.MEM[@i<opnd>] rot 1; {s,z,c}

ROR @i<opnd>      c,.MEM[@i<opnd>] ← c,.MEM[@i<opnd>] rot -1; {s,z,c}

RTI      @w{psw ← .MEM[.sp + 1];} @w{pc<0,8> ← .MEM[.sp + 2];} @w{pc<8,8> ← .MEM[.sp + 3];} @w{sp ← .sp + 3;} @w{pc ← .pc + 1;}

RTS       @w{pc<0,8> ← .MEM[.sp + 1];} @w{pc<8,8> ← .MEM[.sp + 2];} @w{sp ← .sp + 2;} @w{pc ← .pc + 1;}

SBC @i<opnd>   ac ← .ac - .@i<opnd> - (not .c); {s,z,c,v}

SEC      c ← 1;

SED      d ← 1;

SEI      i ← 1;

STA @i<opnd>      MEM[@i<opnd>] ← .ac; {s,z}

STX @i<opnd>      MEM[@i<opnd>] ← .x; {s,z}

STY @i<opnd>      MEM[@i<opnd>] ← .y; {s,z}

TAX      a ← .x;

TAY      a ← .y;

TSX      sp ← .x;

TXA      x ← .a;

TXS      x ← .sp;

TYA      y ← .a;
@leave(oplist)
@appendix(6800) @label(M6800)
@index(Motorola 6800)
@index(6800)
@pagefooting(immediate,right "6800")
@AppendixSection(Machine State)

The registers are:
@enter(itemize)
@i<%A> - accumulator A

@i<%B> - accumulator B

@i<%X> - Index register (16 bits)

@i<sp> - Stack pointer (16 bits)

@i<pc> - The program counter (16 bits)
@leave(itemize)

The flags are:
@enter(itemize)
@i<c> - Carry

@i<o> - Overflow

@i<s> - Sign

@i<z> - Zero

@i<xc> - Auxiliary carry
@leave(itemize)

@AppendixSection(Notation)
@enter(itemize)
@i<mem> - A memory address which can be one of
@enter(itemize)
Base page direct (.MEM[@i<mem>], mem 8 bits)

Extended direct (MEM[@i<mem>], mem 16 bits)

Indexed (MEM[@i<mem>+.%X], mem 8 bits)
@leave(itemize)

@i<memd> - A memory address which can be one one of
@enter(itemize)
Extended direct (MEM[@i<memd>], memd 16 bits)

Indexed (MEM[@i<memd>+.%X], memd 8 bits)
@leave(itemize)

@i<i> - An immediate operand, written as #@i<i>

@i<i16> - A 16-bit immediate operand, written as #@i<i16>

@i<d> - A displacement, usually written as an address; CROSS
will compute the actual displacement between the current
instruction and the destination address.

@i<opnd> - A general operand; may be either @i<mem> or @i<i>.
When interpreted as a value, ".@i<opnd>" may represent either
.MEM[@i<mem>] or @i<i>.  Please excuse the somewhat sloppy notation;
it makes the description more compact.

sr - The status register which holds c,z,s,o,xc.
@leave(itemize)
@AppendixSection(Syntax)
Immediate operands are written with a # symbol, e.g.
@enter(example)
	ADDA #$F9	; Adds hex F9 to A
@leave(example)

Indexing is specified by writing ",X" after the operand.
The operand must be a value which will fit in 8 bits.
@enter(example)
foo==$10
	ADDA  foo,X
@leave(example)
@AppendixSection(Opcodes)

@enter(oplist)
ABA      %A ← .%A + .%B; {c,z,s,o,xc}

ADCA @i<opnd>      %A ← .%A + .@i<opnd> + .c; {c,z,s,o,xc}

ADCB @i<opnd>      %B ← .%B + .@i<opnd> + .c; {c,z,s,o,xc}

ADDA @i<opnd>      %A ← .%A + .@i<opnd>; {c,z,s,o,xc}

ADDB @i<opnd>      %B ← .%b + .@i<opnd>; {c,z,s,o,xc}

ANDA @i<opnd>      %A ← .%A + .@i<opnd>; o←0;  {z,s}

ANDB @i<opnd>      %B ← .%B + .@i<opnd>; o←0;  {z,s}

ASL @i<memd>   c←.@i<memd><7,1>; @i<memd>←.@i<memd>↑1; @w{o←.s xor .c;} {z,s}

ASLA   c←.%A<7,1>; %A←.%A↑1; @w{o←.s xor .c;} {z,s}

ASLB   c←.%B<7,1>; %B←.%B↑1; @w{o←.s xor .c;} {z,s}

ASR @i<memd>      c←.@i<memd><0,1>; @i<memd>←.@i<memd>@ ash@ -1; o←.s@ xor@ .c; {z,s}

ASRA   c←.%A<0,1>; %A←.%A@ ash@ -1; o←.s@ xor@ .c; {z,s}

ASRB   c←.%B<0,1>; %B←.%B@ ash@ -1; o←.s@ xor@ .c; {z,s}

BCC @i<d>      if not .c then BRA @i<d>;

BCS @i<d>       if .c then BRA @i<d>;

BEQ @i<d>      if .z then BRA @i<d>;

BGE @i<d>      if not (.o xor .s) then BRA @i<d>;

BGT @i<d>      if not (.z or (.s xor .o)) then BRA @i<d>;

BHI @i<d>      if not (.c or .z) then BRA @i<d>;

BITA @i<mem>      .%A and .@i<mem>; o ← 0; {z,s}

BITB @i<mem>      .b and .@i<mem>; o ← 0; {z,s}

BLE @i<d>      if .z or (.s xor .o) then BRA @i<d>;

BLS @i<d>      if .c or .z  then BRA @i<d>;

BLT      if .s xor .o  then BRA @i<d>;

BMI @i<d>      if .s then BRA @i<d>;

BNE @i<d>      if not .z then BRA @i<d>;

BPL @i<d>      if not .s then BRA @i<d>;

BR @i<d>      BRA @i<d>;

BRA @i<d>      pc ← .pc + 2 + @i<d>;

BSR @i<d>      @w{MEM[.sp] ← .pc<0,8>;} @w{MEM[.sp - 1] ← .pc<8,8>;} @w{sp ← .sp - 2;} @w{pc ← .pc + @i<d> + 2;}

BVC @i<d>      if not .o then BRA @i<d>;

BVS @i<d>      if .o then BRA @i<d>;

CBA   .%A - .%B; {c,z,s,o}

CLC   c←0;

CLI      ie ← 0;

CLR @i<memd>   @i<memd>←0; c←0; z←1; s←0; o←0;

CLRA      %A ← 0; c←0; z←1; s←0; o←0;

CLRB      %B ← 0; c←0; z←1; s←0; o←0;

CLV       o ← 0;

CMPA @i<opnd>   .%A - .@i<opnd>; {c,z,s,o}

CMPB @i<opnd>   .%B - .@i<opnd>; {c,z,s,o}

COM @i<memd>   @i<memd>←~.@i<memd>; c←1; o←0; {s,z}

COMA   %A←~.%A; c←1; o←0; {s,z}

COMB   %B←~.%B; c←1; o←0; {s,z}

CPX @i<memd>     %X<0,8>-.(@i<memd>+1); %X<8,8>-.@i<memd>; {s,z,o}

DAA   @i<decimal arithmetic>

DEC @i<memd>   @i<memd>←.@i<memd>-1; {s,z,o}

DECA      %A ← .%A - 1; {s,z,o}

DECB      %B ← .%B - 1; {s,z,o}

DES      sp ← .sp - 1; 

DEX      %X ← .%X - 1; {z}

EORA @i<opnd>   %A←%A xor .@i<opnd>; o←0; {s,z}

EORB @i<opnd>   %B←%B xor .@i<opnd>; o←0; {s,z}

INC @i<memd>   @i<memd>←.@i<memd>+1; {s,z,o}

INCA      %A ← .%A + 1; {s,z,o}

INCB      %B ← .%B + 1; {s,z,o}

INS      sp ← .sp + 1;

INX      %x ← .%X + 1; {z}

JMP @i<mem>   pc ← @i<mem>;

JSR @i<mem>   @w{MEM[.sp]←.pc<0,8>;} @w{MEM[.sp-1]←.pc<8,8>;} @w{sp←.sp-2}; @w{pc←@i<mem>};

LDAA

LDAB

LDS @i<mem>     @w{sp<8,8>  ← .@i<mem>;} @w{sp<0,8> ← .(@i<mem> + 1);} @w{o ← 0;} {z,s}

LDS @i<i16>	@w{sp ← i16}; {s,z}

LDX @i<opnd>      @w{%X<8,8> ← .@i<opnd>;} @w{%X<0,8> ← .(@i<opnd> + 1);} @w{o ← 0;}  {z,s}

LSRA

LSRB

NEG @i<memd>   @w{@i<memd> ← 0 -.@i<memd>}; {c,s,z,o}

NEGA   %A ← 0 - .%A; {c,s,z,o}

NEGB   %B ← 0 - .%B; {c,s,z,o}

NOP     ;

ORAA

ORAB

PSHA

PSHB

PULA

PULB

ROL

ROLA

ROLB

ROR

RORA

RORB

RTI

RTS

SBA      %A ← .%A - .%B; {c,z,s,o}

SBCA @i<opnd>   %A ← %A - .@i<opnd> - .c; {c,z,s,o}

SBCB @i<opnd>    %B ← .%B - .@i<opnd> - .c; {c,z,s,o}

SEC   c ← 1;

SEI      ie ← 1;

SEV      o ← 1;

STAA  

STAB

STS @i<mem>   @w{@i<mem> ← .sp<8,8>;} @w{(@i<mem> + 1) ← .sp<0,8>}; o←0; {s,z}

STX @i<mem>   @w{@i<mem> ← .%X<8,8>;} @w{(@i<mem> + 1) ← .%X<0,8>}; o←0; {s,z}

SUBA @i<opnd>   %A ← .%A - .@i<opnd>; {c,s,z,o}

SUBB @i<opnd>   %B ← .%B - .@i<opnd>; {c,s,z,o}

SWI      @i<software interrupt>

TAB    %B ← .%A; o←0; {s,z}

TAP      sr ← .%A; {c,z,s,o,xc}

TBA      %A ← .%B; o←0; {s,z}

TPA     %A ← .sr

TST @i<memd>      c ← 0; z ← .@i<memd> = 0; s ← .@i<memd> < 0; o ← 0;

TSTA       c ← 0; z ← .%A = 0; s ← .%A < 0; o ← 0;

TSTB       c ← 0; z ← .%B = 0; s ← .%B < 0; o ← 0;

TSX      %X ← .sp + 1;

TXS      sp ← .%X - 1;

WAI   MEM[.sp]←.pc<0,8>; MEM[.sp-1]←.pc<8,8>;
MEM[.sp-2]←.%X<0,8>; MEM[.sp-3]←%X<8,8>;
MEM[.sp-4]←.%A; MEM[.sp-5]←.%B;
MEM[.sp-6]←.sr; sp←.sp-7;
@leave(oplist)
@appendix(Compiler directives)
@pagefooting(immediate,right "Compiler directives")

The following compiler directives and their presumed meanings
are described briefly here.  This is only a refresher for those
who have read the DEC assembler description.

@enter(descriptioN)
@index(.ABS)@indexentry(key "ABS",entry ".ABS",number)
@t[.ABS]	Compile non-relocatable (absolute) code.

@index(.ADDR)@indexentry(key "ADDR",entry ".ADDR",number)
@t[.ADDR]	Generates a 16-bit address with the bytes in the
proper order, i.e., <low> <high>.

@index(.ASCII)@indexentry(key "ASCII",entry ".ASCII",number)
@t[.ASCII]	ASCII string delimited by paired markers.

@index(.ASCIZ)@indexentry(key "ASCIZ",entry ".ASCIZ",number)
@t[.ASCIZ]	ASCIZ string delimited by paired markers and supplied with terminal null byte.

@index(.ASECT)@indexentry(key "ASECT",entry ".ASECT",number)
@t[.ASECT]	Begin an absolute (non-relocatable) control section.

@index(.BLKB)@indexentry(key "BLKB",entry ".BLKB",number)
@t[.BLKB]	Allocate space for a number of bytes as specified by the operand.

@index(.BLKW)@indexentry(key "BLKW",entry ".BLKW",number)
@t[.BLKW]	Allocate space for a number of words as specified by the operand.

@index(.BYTE)@indexentry(key "BYTE",entry ".BYTE",number)
@t[.BYTE]	Each expression supplied will be stored in a single byte.

@index(.CSECT)@indexentry(key "CSECT",entry ".CSECT",number)
@t[.CSECT]	Enter a Csect.

@index(.DEPHAse)@indexentry(key "DEPHAse",entry ".DEPHAse",number)
@t[.DEPHA]	Dephase; leave .PHASE control area.

@index(.DSABL)@indexentry(key "DSABL",entry ".DSABL",number)
@t[.DSABL]	See chapter @ref(enable).

@index(.ENABL)@indexentry(key "ENABL",entry ".ENABL",number)
@t[.ENABL]	See chapter @ref(enable).

@index(.END)@indexentry(key "END",entry ".END",number)
@t[.END]	End of program.

@index(.ENDC)@indexentry(key "ENDC",entry ".ENDC",number)
@t[.ENDC]	End of conditional; paired with .IF.

@index(.ENDM)@indexentry(key "ENDM",entry ".ENDM",number)
@t[.ENDM]	End of macro definition or repeat; paired with .MACRO, .IRP, .IRPC, .REPT.

@index(.ENDR)@indexentry(key "ENDR",entry ".ENDR",number)
@t[.ENDR]	End of repetition; paired with .REPT; equivalent to .ENDM in this context.

@index(.EOT)@indexentry(key "EOT",entry ".EOT",number)
@t[.EOT]	End-of-tape; assembler will wait for next tape to be loaded (paper tape hackers only).

@index(.EQUIV)@indexentry(key "EQUIV",entry ".EQUIV",number)
@t[.EQUIV]	?

@index(.ERROR)@indexentry(key "ERROR",entry ".ERROR",number)
@t[.ERROR] x;text	Causes an error message to be issued.  The optional expression x is evaluated and output if present.


@index(.FLT2)@indexentry(key "FLT2",entry ".FLT2",number)
@t[.FLT2]	?

@index(.FLT4)@indexentry(key "FLT4",entry ".FLT4",number)
@t[.FLT4]	?

@index(.GLOBL)@indexentry(key "GLOBL",entry ".GLOBL",number)
@t[.GLOBL]	?

@index(Conditional compilation: .IF)
@index(.IF)@indexentry(key "IF",entry ".IF",number)
@t[.IF]		Enter a conditional.

@index(.IFDF)@indexentry(key "IFDF",entry ".IFDF",number)
@t[.IFDF]	.IFDF <symbol> true if symbol is defined.  See also .IFNDF.

@index(.IFEQ)@indexentry(key "IFEQ",entry ".IFEQ",number)
@t[.IFEQ]	.IFEQ <expression> true if expression evaluates to zero.

@index(.IFF)@indexentry(key "IFF",entry ".IFF",number)
@t[.IFF]	Begins body of conditional if enclosing condition was false.

@index(.IFG)@indexentry(key "IFG",entry ".IFG",number)
@t[.IFG]	.IFG <expression> true if expression greater than zero.

@index(.IFGE)@indexentry(key "IFGE",entry ".IFGE",number)
@t[.IFGE]	.IFG <expression> true if expression greater than or equal to zero.

@index(.IFGT)@indexentry(key "IFGT",entry ".IFGT",number)
@t[.IFGT]	Same as .IFG

@index(.IFL)@indexentry(key "IFL",entry ".IFL",number)
@t[.IFL]	.IFL <expression> true if expression is negative.

@index(.IFLE)@indexentry(key "IFLE",entry ".IFLE",number)
@t[.IFLE]	.IFLE <expression> true if expression is negative or zero.

@index(.IFLT)@indexentry(key "IFLT",entry ".IFLT",number)
@t[.IFLT]	Same as .IFL.

@index(.IFNDF)@indexentry(key "IFNDF",entry ".IFNDF",number)
@t[.IFNDF]	.IFNDF <symbol> true if symbol is undefined.

@index(.IFNE)@indexentry(key "IFNE",entry ".IFNE",number)
@t[.IFNE]	.IFNE <expression> true if expression is non-zero.

@index(.IFNZ)@indexentry(key "IFNZ",entry ".IFNZ",number)
@t[.IFNZ]	Same as .IFNE

@index(.IFT)@indexentry(key "IFT",entry ".IFT",number)
@t[.IFT]	Begins body of conditional if enclosing condition was true.

@index(.IFTF)@indexentry(key "IFTF",entry ".IFTF",number)
@t[.IFTF]	Text from here to the next .IFT, .IFF or .IFTF or the
end of the conditional will be included independent of the value of
the condition of the enclosing conditional.

@index(.IFZ)@indexentry(key "IFZ",entry ".IFZ",number)
@t[.IFZ]	Same as .IFE

@index(.IIF)@indexentry(key "IIF",entry ".IIF",number)
@t[.IIF] condition, arg, stmnt

      Immediate if; if condition is met, stmnt is emitted.

@index(.IRP)@indexentry(key "IRP",entry ".IRP",number)
@t[.IRP] sym,<arglist>	  Indefinite repeat of body based upon number of parameters in <arglist>.

@index(.IRPC)@indexentry(key "IRPC",entry ".IRPC",number)
@t[.IRPC] sym,<str>	Indefinite repeat of body based upon number of characters in <str>.

@index(.LIMIT)@indexentry(key "LIMIT",entry ".LIMIT",number)
@t[.LIMIT]	Reserves two words into which are put the lower and
upper boundaries of the code.

@index(.LIST)@indexentry(key "LIST",entry ".LIST",number)
@t[.LIST]	Enable listing.

@index(.LOCAL)@indexentry(key "LOCAL",entry ".LOCAL",number)
@t[.LOCAL]	?

@index(.MACRO)@indexentry(key "MACRO",entry ".MACRO",number)
@index(Macro definition)
@t[.MACRO] name <arglist>

      Begin a macro definition

@index(.MCALL)@indexentry(key "MCALL",entry ".MCALL",number)
@t[.MCALL]	Call macros from the system library.

@index(.MEXIT)@indexentry(key "MEXIT",entry ".MEXIT",number)
@t[.MEXIT]	Leave macro expansion

@index(.NARG)@indexentry(key "NARG",entry ".NARG",number)
@t[.NARG] sym	The symbol is equated to the  number of arguments to the macro

@index(.NCHR)@indexentry(key "NCHR",entry ".NCHR",number)
@t[.NCHR] sym,<str>	The symbol is equated to the number of characters in <str>

@index(.NLIST)@indexentry(key "NLIST",entry ".NLIST",number)
@t[.NLIST]	Turn off listing

@index(.NTYPE)@indexentry(key "NTYPE",entry ".NTYPE",number)
@t[.NTYPE] sym,arg	The symbol is equated to the addressing mode of the argument.

@index(.PAGE)@indexentry(key "PAGE",entry ".PAGE",number)
@t[.PAGE]	Force a page break

@index(.PDP10)@indexentry(key "PDP10",entry ".PDP10",number)
@t[.PDP10]	Irrelevant

@index(.PHASE)@indexentry(key "PHASE",entry ".PHASE",number)
@t[.PHASE]	Assemble code as if it were located according to
the argument of this directive.

@index(.PRINT)@indexentry(key "PRINT",entry ".PRINT",number)
@t[.PRINT]	Print the text which follows on the terminal.

@index(.PSECT)@indexentry(key "PSECT",entry ".PSECT",number)
@t[.PSECT]	

@index(.RADIX)@indexentry(key "RADIX",entry ".RADIX",number)
@t[.RADIX]	Change the radix to the value specified to this directive.

@index(.RAD50)@indexentry(key "RAD50",entry ".RAD50",number)
@t[.RAD50]	Each argument is converted to a radix50 representation,
whatever that means for a microcomputer.

@index(.REM)@indexentry(key "REM",entry ".REM",number)
@t[.REM]

@index(.REPT)@indexentry(key "REPT",entry ".REPT",number)
@t[.REPT]	(.REPT <n>) Repeat the body of this directive the indicated number
of times.

@index(.ROUND)@indexentry(key "ROUND",entry ".ROUND",number)
@t[.ROUND]	Perform arithmetic operations with rounding to integer result (see also .TRUNC).

@index(.SBTTL)@indexentry(key "SBTTL",entry ".SBTTL",number)
@t[.SBTTL]	Specify subtitle text.

@index(.TITLE)@indexentry(key "TITLE",entry ".TITLE",number)
@t[.TITLE]	Specify title text.

@index(.TRUNC)@indexentry(key "TRUNC",entry ".TRUNC",number)
@t[.TRUNC]	Perform arithmetic operations with truncation to integer result (see also .ROUND)

@index(.WORD)@indexentry(key "WORD",entry ".WORD",number)
@t[.WORD]	Allocate space for each value specified.  Each expression evaluates to a word (16 bits).

@leave(descriptioN)
@appendix(Macro quick summary)
@pagefooting(immediate,right "Macro summary")

@enter(description)
@index(?, macro argument modifier)
?      When specified with a formal, will cause a compiler-generated
symbol to be provided if an actual is not given in that position.

@index(Macro, concatenation) @index(Concatenation operator) @index(', concatenation)

'      Internal concatenation character

@index(\, macro argument modifier)
\<expr>    When used as an argument, evaluates <expr> before performing
the actual-formal match.
@leave(description)
@appendix(Assembler syntax quick summary)
@pagefooting(immediate,right "Assembler summary")

@enter(description)
@index(<...>)
<...>      Encloses any expression (the assembler's equivalent of
parentheses).  Expressions are evaluated left-to-right without
operator heirarchy.

@index(+)
+      Addition or unary plus

@index(-)
-      Subtraction or unary minus

@index(*)
*      Multiplication

@index(/)
/      Division

@index(&) @index(And, assembler operator)
&      Logical and

@index(!) @index(Or, assembler operator)
!      Logical or

@index(Comment delimiter) @index(;, comment delimiter)
;      Begins comment field

@index(Macro, concatenation) @index(Concatenation operator) @index(', concatenation)

'      Indicates single ASCII character as a term in expressions.

@index(↑O<expr>)
↑O     Indicates octal number

@index(↑B<expr>)
↑B     Indicates binary number

@index(=)
=      Symbol assignment

@index(Current location counter) @index(Location counter) @index(., location counter)
.      Current location counter

@index($<expr>)
$      Indicates hexadecimal number

@index(%<expr>)
%      Indicates binary number (6502/6800 mode only)

@index(↑, <expr>↑)
↑      If a postfix operator, divides the expression by 256.
@leave(descriptioN)
@pagefooting(right "Index")